Front End Design Engineer for AI Hardware Evaluation

You will evaluate AI-generated work related to RTL hardware design. You will use RTL designs, hardware specifications, reference solutions, and verification tests to make careful judgments and explain your reasoning.

The work focuses on reviewing model outputs against project guidelines and keeping decisions consistent across repeated tasks.

• Evaluate model outputs using project rubrics and record evidence-based judgments.
• Review RTL designs, hardware specifications, reference solutions, and verification tests.
• Explain your decisions clearly so feedback can improve model behavior.
• Maintain consistent quality across review tasks.

This is contractor work in the front-end digital design area.

• Pay: The listing does not provide a compensation rate.
• Time: 20 or more hours per week.
• Schedule: Four hours of daily overlap with Pacific Time is required.
• Location: Open worldwide.
• Language: Fluent English.
• Design experience: Front-end digital design on ASIC or FPGA projects, including work from RTL through synthesis.
• RTL skills: Fluent Verilog and SystemVerilog, including microarchitecture, datapaths, finite-state machines, pipelines, FIFOs, clock-domain crossings, and clock gating.
• Analysis skills: Read timing and quality-of-results reports and understand which RTL or constraint changes affect area, timing, or power.

Apply on OpenTrain with your resume and then complete the application on the hiring site.

AI training is the human work behind systems that learn from examples, including reviewing model answers and evaluating technical outputs. People with strong subject knowledge help make those evaluations accurate and useful.